Energy-efficient Raman amplifier for edge computing
The RAMAN accelerator is designed to leverage data and weight sparsity to deploy deep neural networks at the edge, ensuring low power consumption, minimal storage requirements, and reduced processing latency. To introduce novel solutions that can be viable for extreme edge cases, hybrid solutions combining conventional. Abstract—The shift from centralized cloud to edge comput-ing demands hardware systems with data processing capability at ultra-low power. Researchers at the Department of Electronic Systems Engineering, IISc, led by Chetan Singh Thakur, have developed an AI co-processor called RAMAN, or Re-configurable And sparse tinyML Accelerator for infereNce. This paper introduces the Modified Dadda Approximate Multiplier (MDAM), an innovative architecture that optimizes hardware economy.
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